Computer Architecture

Organizer :

Princeton University

Location :

online

Start Date:

6/02/2019

End Date :

6/03/2019

Computer Architecture

In this course, you will learn to design the computer architecture of complex modern microprocessors.

All the features of this course are available for free. 

Week 1:

Introduction, Instruction Set Architecture, and Microcode

This lecture will give you a broad overview of the course, as well as the description of architecture, micro-architecture and instruction set
architectures.

Pipelining Review

This lecture covers the basic concept of pipeline and two different types of hazards.

Week 2:

Cache Review

This lecture covers control hazards and the motivation for caches.

Superscalar 1

This lecture covers cache characteristics and basic superscalar architecture.

Week3:

Superscalar 2 & Exceptions

This lecture covers the common issues for superscalar architecture.

Superscalar 3

This lecture covers different kinds of architectures for out-of-order processors.

Week 4:

Superscalar 4

This lecture covers the common methods used to improve the performance of out-of-order processors including register renaming and memory disambiguation.

VLIW 1

This lecture covers the basic concept of very long instruction word (VLIW) processors.

To Apply Please Follow The Link Below:

https://www.coursera.org/learn/comparch

 

 

Computer Architecture

Organizer :

Princeton University

Location :

online

Start Date:

6/02/2019

End Date :

6/03/2019

Computer Architecture

In this course, you will learn to design the computer architecture of complex modern microprocessors.

All the features of this course are available for free. 

Week 1:

Introduction, Instruction Set Architecture, and Microcode

This lecture will give you a broad overview of the course, as well as the description of architecture, micro-architecture and instruction set
architectures.

Pipelining Review

This lecture covers the basic concept of pipeline and two different types of hazards.

Week 2:

Cache Review

This lecture covers control hazards and the motivation for caches.

Superscalar 1

This lecture covers cache characteristics and basic superscalar architecture.

Week3:

Superscalar 2 & Exceptions

This lecture covers the common issues for superscalar architecture.

Superscalar 3

This lecture covers different kinds of architectures for out-of-order processors.

Week 4:

Superscalar 4

This lecture covers the common methods used to improve the performance of out-of-order processors including register renaming and memory disambiguation.

VLIW 1

This lecture covers the basic concept of very long instruction word (VLIW) processors.

To Apply Please Follow The Link Below:

https://www.coursera.org/learn/comparch